• 홈
  • reduced instruction set computing

reduced instruction set computing

processor executing one instruction in minimal clock cycles

en-GB/ɹɪˈdjuːst ɪnˈstɹʌkʃn ˈsɛt kəmˈpjuːtɪŋ/
en-US/ɹɪˈdust ˌɪnˈstɹʌkʃən ˈsɛt kəmˈpjutɪŋ/

카테고리:

processor designinstruction set architectureDesign paradigm