Beranda
reduced instruction set computing

reduced instruction set computing

processor executing one instruction in minimal clock cycles

en-GB/ɹɪˈdjuːst ɪnˈstɹʌkʃn ˈsɛt kəmˈpjuːtɪŋ/

en-US/ɹɪˈdust ˌɪnˈstɹʌkʃən ˈsɛt kəmˈpjutɪŋ/

Kategori:

processor design instruction set architecture Design paradigm