reduced instruction set computing

processor executing one instruction in minimal clock cycles

en-GB/ɹɪˈdjuːst ɪnˈstɹʌkʃn ˈsɛt kəmˈpjuːtɪŋ/
en-US/ɹɪˈdust ˌɪnˈstɹʌkʃən ˈsɛt kəmˈpjutɪŋ/

دسته بندی ها:

processor designinstruction set architectureDesign paradigm