reduced instruction set computing

processor executing one instruction in minimal clock cycles

en-US/ɹɪˈdust ˌɪnˈstɹʌkʃən ˈsɛt kəmˈpjutɪŋ/
en-GB/ɹɪˈdjuːst ɪnˈstɹʌkʃn ˈsɛt kəmˈpjuːtɪŋ/

Κατηγορίες:

processor designinstruction set architectureDesign paradigm