instruction set architecture
set of abstract symbols (called instructions) which identify and describe operations in a computer program to a computer processor
Parallel Thread Execution
low-level parallel thread execution virtual machine and instruction set architecture
Intel SHA extensions
extensions to the x86 instruction set architecture
MIPS architecture
instruction set architecture
DEC Alpha
64-bit RISC microprocessor
minimal instruction set computer
instruction set architecture
explicitly parallel instruction computing
instruction set architecture
RISC-V
open-source CPU hardware instruction set architecture
Intel Deep Learning Boost
Intel marketing term for ISA extensions
PowerPC
RISC instruction set architecture by AIM alliance
Power Architecture
instruction set architecture
PA-RISC
instruction set architecture by Hewlett-Packard
VAX
computer architecture, and a range of computers
One instruction set computer
abstract machine that uses only one instruction
Explicit Data Graph Execution
type of instruction set architecture that combines many individual instructions into a larger group ("hyperblock") which can be easily run in parallel
Power ISA
computer instruction set architecture
Advanced Matrix Extensions
Processor extension developed by Intel
SPARC
RISC instruction set architecture
Clipper architecture
32-bit RISC-like computing architecture
load/store architecture
type of instruction set architecture
complex instruction set computer
computer architecture predating or contrasting with reduced instruction set computer (RISC)
reduced instruction set computing
processor executing one instruction in minimal clock cycles
very long instruction word
type of instruction set architecture
Transactional Synchronization Extensions
extension to the x86 instruction set architecture that adds hardware transactional memory support
Advanced Synchronization Facility
Proposed extension to the x86-64 instruction set architecture that adds hardware transactional memory support
NEON
SIMD architecture extension for ARM processors
bit manipulation instructions set
x86 instruction set architecture extension